This design is a ISDB-S3-LDPC-BCH Decoder IP, ready to license, verified and packaged, and supplied as a portable and synthesizable Verilog IP. The system was designed to be used in conjunction ...
The IPrium-CCSDS-LDPC-8160-7136-Encoder-Decoder IP Core implements Low Density Parity Check (LDPC) forward error correction algorithm for CCSDS 131.0 ...
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