MOUNTAIN VIEW, Calif. — Proclaiming a significant step forward for C-language design, Synopsys Inc. will announce on Monday (Feb. 11) a complete SystemC simulation environment. It's already been put ...

Synopsys has completed its SystemC design-and-verification support with the release of the latest version of CoCentric System Studio. The SystemC simulator lets designers verify complex designs at the ...

SAN JOSE, Calif. — SystemC is seeing increasing use as a way of accelerating simulation, according to speakers at the DVCon Design and Verification Conference. Meanwhile, speakers noted important ...

The concept of system architectural definition at a level of abstraction higher than RTL is a good one. Such methodologies become much more feasible as tools roll out in support. To that end, Synopsys ...

Synopsys has unveiled the DesignWare System Level Library. The library provides high performance SystemC transaction level simulation models (TLMs) for assembling virtual platforms, including ...

Power consumption is often more important than performance in today’s SoC designs because of battery size and power dissipation limitations. The dilemma is that the most leverage available to optimize ...

I am amazed how often simulation performance comes up when discussing SystemC and transaction-level modeling. Some of this I can understand. If you are new to transaction-level modeling the ...

Sometimes design abstraction is a help, and sometimes it's a hindrance. Verification of system-on-a-chip designs with SystemC has a demonstrated ability to significantly speed up simulation runs.